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fn8709 rev 0.00 page 1 of 13 april 17, 2015 fn8709 rev 0.00 april 17, 2015 isl91110ir high efficiency buck-boost r egulator with 5.4a switches datasheet the isl91110ir is a high-current buck-b oost switching regulator for systems using new battery chemistries. it uses intersil?s proprietary buck-boost algorithm to maintain voltage regulation while providing excellent efficiency and very low output voltage ripple when the input voltage is close to the output voltage. the isl91110ir is capable of delivering at least 2a continuous output current (v out = 3.3v) over a battery voltage range of 2.5v to 4.35v. this maximizes the energy utilization of advanced single-cell li-ion battery chemistries that have significant capacity left at voltages below the system voltage. its fully synchronous low on-resistance 4-switch architecture and a low quiescent current of only 35a optimize effi ciency under all load conditions. the isl91110ir supports standalo ne applications with a fixed 3.3v or 3.5v output voltage or ad justable output voltage with an external resistor divider. output vo ltages as low as 1v or as high as 5.2v are supported. the isl91110ir requires only a single inductor and very few external components. power supply solution size is minimized by its 2.5mhz switching frequency, allowing small size external components. the isl91110ir is available in a 4mmx4mm, 20 ld tqfn package. features ? accepts input voltages above or below regulated output voltage ? automatic and seamless transitions between buck and boost modes ? input voltage range: 1.8v to 5.5v ? output current: up to 2a (pvin = 3.4v, v out = 5v) ? output current: up to 2a (pvin = 2.5v, v out = 3.3v) ? burst current: up to 3a (pvin = 2.9v, v out = 3.3v, t on < 600s, t = 4.6ms) ? high efficiency: up to 95% ? 35a quiescent current maxi mizes light load efficiency ? 2.5mhz switching frequency minimizes external component size ? fully protected for short-circuit, over-temperature and undervoltage ? small 4mmx4mm 20 ld tqfn package applications ? smartphones and tablet pcs ? wireless communication devices ? optical modules networking equipment related literature ug022 , ?isl91110irx-evz evaluation boards user guide? table 1. key differences between family of parts part number adj or fixed v out isl91110irnz-t 3.3 isl91110irnz-t7a 3.3 isl91110ir2az-t 3.5 isl91110ir2az-t7a 3.5 isl91110iraz-t adj isl91110iraz-t7a adj figure 1. typical application: v out = 3.3v figure 2. efficiency: v out = 3.3v, t a = +25 c pvin v in = 1.8v to 5.5v v out = 3.3v up to 3a isl91110irnz vin en lx1 lx2 vout fb sgnd pgnd c 1 2x10f l 1 1h c 2 2x22f mode 70 75 80 85 90 95 100 1 10 100 1000 v in = 3.6v v in = 3v v in = 4.2v v in = 3.3v efficiency (%) load current (ma)
isl91110ir fn8709 rev 0.00 page 2 of 13 april 17, 2015 block diagram osc error amp pvin control vin monitor lx1 vref ref reverse current vout 1 gate drivers and anti-shoot thru 10 vin thermal shutdown current detect 18 11 en 15 fb 3 pgnd sgnd en en en en vout clamp voltage prog. lx2 19 12 comp mode 2 17 q1 q2 q3 q4 adj output fixed output 4 5 8 9 7 6 20 14 13 16 nc - + + - + - figure 3. block diagram
isl91110ir fn8709 rev 0.00 page 3 of 13 april 17, 2015 pin configuration isl91110ir (20 ld, 4x4 tqfn) top view vout vout vout vout nc pvin pvin pvin pvin vin lx2 pgnd lx1 lx2 lx1 fb sgnd mode sgnd en 1 2 3 4 5 678910 15 14 13 12 11 20 19 18 17 16 epad pin descriptions pin # pin names description 6, 7, 8, 9, pvin power input; range: 1.8v to 5.5v. connect 2x10 f capacitors to pgnd. 4, 5 lx1 inductor connection, input side 3 pgnd power ground for high switching current 1, 2 lx2 inductor connection, output side 17, 18, 19, 20 vout buck-boost regulator output; connect 2x22 f capacitors to pgnd for v out = 3.3v and 3.5v applications, and 2x47f capacitors to pgnd for v out = 4.5v and 5v applications. 12 mode logic input, high for auto pfm mode. low for forced pwm operation. also, this pin can be used with an external clock sync input. range: 2.75mhz to 3.25mhz. do not leave floating. 10 vin supply input; range: 1.8v to 5.5v. 11 en logic input, drive high to enable device. do not leave floating. 13, 14 sgnd analog ground pin 15 fb voltage feedback pin, connect directly to the vout pin for fixed output voltage versions. 16 nc no connect pin epad thermal pad, connect to pgnd ordering information part number ( notes 1, 2, 3 ) part marking output voltage (v) temp range (c) package tape and reel (rohs compliant) pkg. dwg. # isl91110irnz-t 91110n 3.3 -40 to +85 20 ld 4x4 tqfn l20.4x4c isl91110irnz-t7a 91110n 3.3 -40 to +85 20 ld 4x4 tqfn l20.4x4c isl91110ir2az-t 911102 3.5 -40 to +85 20 ld 4x4 tqfn l20.4x4c isl91110ir2az-t7a 911102 3.5 -40 to +85 20 ld 4x4 tqfn l20.4x4c isl91110iraz-t 91110a adj -40 to +85 20 ld 4x4 tqfn l20.4x4c isl91110iraz-t7a 91110a adj -40 to +85 20 ld 4x4 tqfn l20.4x4c isl91110irn-evz evaluation board for isl91110irnz isl91110ir2a-evz evaluation board for isl91110ir2az ISL91110IRA-EVZ evaluation board for isl91110iraz notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged pr oducts employ special pb-free material sets , molding compounds/die attach materials and 100% matte tin plate plus anneal (e3 termination finish, which is rohs complian t and compatible with both snpb and pb-free soldering operation s). intersil pb-free products are msl classified at pb-free peak reflow temperatures th at meet or exceed the pb-free requirements of ipc/jedec j std -020. 3. for moisture sensitivity level (msl), please see product information page for isl91110ir . for more information on msl please see techbrief tb363 .
isl91110ir fn8709 rev 0.00 page 4 of 13 april 17, 2015 absolute maximum rating s thermal information pvin, vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v lx1, lx2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v fb (adjustable version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 2.7v fb (fixed v out versions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v sgnd, pgnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 0.3v all other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v esd rating human body model (tested per jesd22-a114e) . . . . . . . . . . . . . . . . 3kv machine model (tested per jesd22-a115-a) . . . . . . . . . . . . . . . . . 200v charge device model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kv latch-up (tested per jesd-78b; class 2, level a) . . . . . . . . . . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jc (c/w) 20 ld 4x4 tqfn package ( notes 4 , 5 ). . . . 39 4 maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125c storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 recommended operating conditions ambient temperature range . . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c supply voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8v to 5.5v max load current (v in = 3.4v, v out = 5v). . . . . . . . . . . . . . . . . . . . . . . 2adc max load current (v in = 2.5v, v out = 3.3v) . . . . . . . . . . . . . . . . . . . . . 2adc max load current (v in = 2.9v, v out = 3.3v, t on = 600s, t = 4.6ms) . . . . . 3a caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ? ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379 5. for ? jc , the ?case temp? location is the center of the exposed metal pad on the package underside. analog specifications v in = v pvin = v en = 3.6v, v out = 3.3v, l1 = 1h, c1 = 2x10f, c2 = 2x22f, t a = +25c. boldface limits apply across the operating temperature range, -40c to +85c and input voltage range (1.8v to 5.5v) unless specified otherwise. symbol parameter test conditions min ( note 6 ) typ ( note 7 ) max ( note 6 )units power supply v in input voltage range 1.8 5.5 v v uvlo v in undervoltage lockout threshold rising 1.725 1.775 v falling 1.550 1.650 v i vin v in supply current pfm mode, no external load on v out ( note 8 )35 60 a i sd v in supply current, shutdown en = sgnd, v in = 3.6v 0.05 1.0 a output voltage regulation v out output voltage range isl91110iraz, i out = 100ma, v in = 3.6v 1.00 5.20 v output voltage accuracy v in = 3.7v, v out = 3.3v, i out = 0ma, pwm mode -2 +2 % v in = 3.7v, v out = 3.3v, i out = 1ma, pfm mode -3 +4 % v fb fb pin voltage regulation for adjustable output version, v in = 3.6v 0.783 0.80 0.813 v i fb fb pin bias current for adjustable output version 20 na ? v out / ? v in line regulation, pwm mode i out = 500ma, v out = 3.3v, v in step from 2.3v to 5.5v 5 mv/v ? v out / ? i out load regulation, pwm mode v in = 3.7v, v out = 3.3v, i out step from 0ma to 1000ma 0.005 mv/ma ? v out / ? v i line regulation, pfm mode i out = 100ma, v out = 3.3v, v in step from 2.3v to 5.5v 12.5 mv/v ? v out / ? i out load regulation, pfm mode v in = 3.7v, v out = 3.3v, i out step from 0ma to 100ma 0.4 mv/ma v clamp output voltage clamp rising 5.25 5.95 v output voltage clamp hysteresis 400 mv dc/dc switching specifications f sw oscillator frequency 2.1 2.50 2.9 mhz t onmin minimum on time 80 ns i pfetleak lx1 pin leakage current v in = 3.6v -1 1 a i nfetleak lx2 pin leakage current v in = 3.6v -1 1 a
isl91110ir fn8709 rev 0.00 page 5 of 13 april 17, 2015 soft-start and soft discharge t ss soft-start time time from when en signal asserts to when output voltage ramp starts. 1ms time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in buck mode. v in = 4v, v out = 3.3v, i o = 200ma 1ms time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in boost mode. v in = 2v, v out = 3.3v, i o = 200ma 2ms r dischg v out soft-discharge on-resistance en < v il 120 power mosfet r dson_p p-channel mosfet on-resistance v in = 3.6v, i o = 200ma 47 m v in = 2.5v, i o = 200ma 62 m r dson_n n-channel mosfet on-resistance v in = 3.6v, i o = 200ma 40 m v in = 2.5v, i o = 200ma 55 m i pk_lmt p-channel mosfet peak current limit 4.9 5.4 5.9 a pfm/pwm transition load current threshold, pfm to pwm v in = 3.6v, v out = 3.3v 200 ma load current threshold, pwm to pfm v in = 3.6v, v out = 3.3v 75 ma thermal shutdown 155 c thermal shutdown hysteresis 30 c logic inputs i leak input leakage v in = 3.6v 0.05 1 a v ih input high voltage v in = 3.6v 1.4 v v il input low voltage v in = 3.6v 0.4 v notes: 6. parameters with min and/or max limits are 100% tested at +25c , unless otherwise specified. te mperature limits established by characterization and are not production tested. 7. typical values are for t a = +25c and v in = 3.6v. 8. quiescent current measurements are taken when the output is not switching. analog specifications v in = v pvin = v en = 3.6v, v out = 3.3v, l1 = 1h, c1 = 2x10f, c2 = 2x22f, t a = +25c. boldface limits apply across the operating temperature range, -40c to +85c and in put voltage range (1.8v to 5.5v) unless specified otherwise. (continued) symbol parameter test conditions min ( note 6 ) typ ( note 7 ) max ( note 6 )units
isl91110ir fn8709 rev 0.00 page 6 of 13 april 17, 2015 typical performance curves unless otherwise noted, operating conditions are: t a = +25c, v in = en = 3.6v, l = 1h, c 1 = 2x10f, c 2 = 2x22f, v out = 3.3v, i out = 0a to 3a. figure 4. efficiency vs input voltage (v out = 5v) figure 5. output voltage vs load current (v out = 5v) figure 6. efficiency: v out = 5v, t a = +25c figure 7. output voltage vs load current (v out = 3.3v) figure 8. efficiency vs input voltage (v out = 3.3v) figure 9. quiescent current vs input voltage (mode = high) 80 82 84 86 88 90 92 94 96 98 100 2.5 3.0 3.5 4.0 4.5 5.0 efficiency (%) v in (v) load = 500ma load = 100ma load = 1000ma 5.040 5.060 5.080 5.100 5.120 5.140 1 10 100 1000 v out (v) load current (ma) v in = 3.6v v in = 4.2v v in = 4.2v v in = 3v v in = 3.3v 70 75 80 85 90 95 100 1 10 100 1000 efficiency (%) load current (ma) v in = 3.6v v in = 4.2v v in = 3.3v v in = 3v 3.240 3.260 3.280 3.300 3.320 3.340 1 10 100 1000 load current (ma) v out (v) v in = 4.2v v in = 3v v in = 3.3v v in = 3.6v 80 82 84 86 88 90 92 94 96 98 100 2.02.53.03.54.04.55.0 v in (v) efficiency (%) load = 100ma load = 1000ma load = 500ma 30 40 50 60 70 80 90 100 110 120 130 1.52.53.54.55.5 quiescent current (a) v in (v) v out = 5v v out = 3.3v
isl91110ir fn8709 rev 0.00 page 7 of 13 april 17, 2015 figure 10. steady state operation in pfm (v in = 4v, v out =3.3v, no load) figure 11. steady state operation in pwm (v in = 4v, v out =3.3v, no load) figure 12. soft-start (v in = 3.6v, v out = 3.3v, no load) figure 13. soft-start (v in = 3.6v, v out = 3.3v, 1a rload) figure 14. steady state operation (v in = 2.5v, v out = 3.3v, 2a load) figure 15. 0a to 2a load transient (v in = 3.6v, v out = 3.3v) typical performance curves unless otherwise noted, operating conditions are: t a = +25c, v in = en = 3.6v, l = 1h, c 1 = 2x10f, c 2 = 2x22f, v out = 3.3v, i out = 0a to 3a. (continued) lx1 (2v/div) lx2 (2v/div) v out (ac, 20mv/div) i l (500ma/div) 400ns/div lx1 (2v/div) i l (200ma/div) v out (ac, 10mv/div) lx2 (2v/div) 400ns/div en (2v/div) v out (1v/div) i l (500ma/div) 400s/div 400s/div i l (500ma/div) v out (1v/div) en (2v/div) 400ns/div v out (ac, 50mv/div) lx2 (2v/div) lx1 (2v/div) i l (1a/div) 200s/div v out (ac, 200mv/div) i load (1a/div)
isl91110ir fn8709 rev 0.00 page 8 of 13 april 17, 2015 figure 16. 0.5a to 1.5a load transient (v in = 3.6v, v out = 3.3v) figure 17. 0a to 1a load transient (v in = 3.6v, v out = 3.3v) figure 18. 4v to 3.2v line transient (v out = 3.3v, load = 1a) figure 19. 0.1a to 2a load transient (v in = 3.6v, v out = 5v) figure 20. 0.5a to 2a load transient (v in = 3.6v, v out = 5v) typical performance curves unless otherwise noted, operating conditions are: t a = +25c, v in = en = 3.6v, l = 1h, c 1 = 2x10f, c 2 = 2x22f, v out = 3.3v, i out = 0a to 3a. (continued) i load (500ma/div) v out (ac, 200mv/div) 200s/div 100s/div i load (500ma/div) v out (ac, 100mv/div) v in (1v/div) v out (ac, 200mv/div) 20s/div 200s/div i load (1a/div) v out (ac, 500mv/div) 200s/div i load (1a/div) v out (ac, 500mv/div)
isl91110ir fn8709 rev 0.00 page 9 of 13 april 17, 2015 functional description functional overview refer to the ? block diagram ? on page 2 . the isl91110ir implements a complete buck boost switching regulator, with pwm controller, internal switches, references, protection circuitry and control inputs. the pwm controller automatically switches between buck and boost modes as necessary to maintain a steady output voltage with changing input voltages and dynamic external loads. internal supply and references referring to the ? block diagram ? on page 2 , the isl91110ir provides four power input pins. the pvin pin supplies input power to the dc/dc converter, while the vin pin provides operating voltage source required for stable v ref generation. separate ground pins (sgnd and pgnd) are provided to avoid problems caused by ground shift due to the high switching currents. enable input the device is enabled by asserting the en pin high. driving en low invokes a power-down mode, where most internal device functions are disabled. soft discharge when the device is disabled by driving en low, an internal resistor between vout and sgnd is activated to slowly discharge the output capacitor. this internal resistor has a typical 120 resistance. por sequence and soft-start asserting the en pin high allows the device to power-up. a number of events occur during the start-up sequence. the internal voltage reference powers up and stabilizes. the device then starts to operate. there is a typical 1ms delay between assertion of the en pin and th e start of switching regulator soft-start ramp. the soft-start feature minimizes output voltage overshoot and input in-rush currents. during soft-start, the reference voltage is ramped to provide a ramping v out voltage. while the output voltage is lower than approximat ely 20% of the target output voltage, switching frequency is reduced to a fraction of the normal switching frequency to aid in producing low duty cycles necessary to avoid input in-rush current spikes. once the output voltage exceeds 20% of the target voltage, switching frequency is increased to its nominal value. when the target output voltage is higher than the input voltage, there will be a transition from buck mode to boost mode during the soft-start sequence. at the time of this transition, the ramp rate of the reference voltage is decreased, such that the output voltage slew rate is decreased. this provides a slower output voltage slew rate. the v out ramp time is not constant for all operating conditions. soft-start into boost mode will take longer than soft-start into buck mode. the total soft-start time into buck operating mode is typically 2ms, whereas the typica l soft-start time into boost mode operating mode is typically 3ms. increasing the load current will increase these typical soft-start times. short circuit protection the isl91110ir provides short-circuit protection by monitoring the feedback voltage. when feedback voltage is sensed to be lower than a certain threshold, the pwm oscillator frequency is reduced in order to protect the device from damage. the p-channel mosfet peak current limit remains active during this state. thermal shutdown a built-in thermal protection feature protects the isl91110ir, if the die temperature reaches +155c (typical). at this die temperature, the regulator is completely shut down. the die temperature continues to be monitored in this thermal shutdown mode. when the die temperature falls to +125c (typical), the device will resume normal operation. when exiting thermal shutdown, the isl91110ir will execute its soft-start sequence. buck-boost conversion topology the isl91110ir operates in either buck or boost mode. when operating in conditions where pvin is close to vout, isl91110ir alternates between buck and boost mode as necessary to provide a regulated output voltage. figure 21 shows a simplified diagram of the internal switches and external inductor. pwm operation in buck pwm mode, switch d is continuously closed and switch c is continuously open. switches a and b operate as a synchronous buck converter when in this mode. in boost pwm mode, switch a remains closed and switch b remains open. switches c and d operate as a synchronous boost converter when in this mode. pfm operation during pfm operation in buck mo de, switch d is continuously closed and switch c is continuously open. switches a and b operate in discontinuous mode during pfm operation. during pfm operation in boost mode, the isl91110ir closes switch a and switch c to ramp up the current in the inductor. when the inductor current reaches a certain threshold, the device turns off switches a and c, then turns on switches b and d. with switches b and d closed, output voltage increases as the inductor current ramps down. figure 21. buck boost topology pvin vout switch a switch d switch b switch c lx1 lx2 l 1
isl91110ir fn8709 rev 0.00 page 10 of 13 april 17, 2015 in most operating conditions, th ere will be multiple pfm pulses to charge up the output capacito r. these pulses continue until v out has achieved the upper thre shold of the pfm hysteretic controller. switching then stops and remains stopped until v out decays to the lower threshold of the hysteretic pfm controller. operation with v in close to v out when the output voltage is close to the input voltage, the isl91110ir will rapidly and smoothly switch from boost to buck mode as needed to maintain the regulated output voltage. this behavior provides excellent efficiency and very low output voltage ripple. output voltage programming the isl91110ir is available in fixed and adjustable output voltage versions. to use the fixed output version, the vout pin must be connected directly to fb. in the adjustable output voltage version (isl91110iraz), an external resistor divider is required to program the output voltage. the fb pin has very low input leakage current, so it is possible to use large value resistors (e.g., r 1 = 187k and r 2 =60.4k for v out = 3.3v) in the resistor divider connected to the fb input. applications information component selection the fixed-output version of isl91110ir requires only three external power components to implement the buck boost converter: an inductor, an input capacitor and an output capacitor. the adjustable output version of isl91110ir requires three additional components to progra m the output voltage, as shown in figure 22 . two external resistors program the output voltage and a small capacitor is added to improve stability and response. output voltage prog ramming, adjustable version when vref is connected to sgnd, setting and controlling the output voltage of the isl91110iraz (adjustable output version) can be accomplished by selectin g the external resistor values. equation 1 can be used to derive the r 1 and r 2 resistor values: when designing a pcb, include a sgnd guard band around the feedback resistor network to reduce noise and improve accuracy and stability. resistors r 1 and r 2 should be positioned close to the fb pin. feed-forward capacitor selection a small capacitor (c3 in figure 22 ) in parallel with resistor r 1 is required to provide the specified load and line regulation. the suggested value of this capacitor is 22pf for r 1 = 187k . an npo type capacitor is recommended. figure 22. adjustable output application pvin v in = 1.8v to 5.5v v out = 1v to 5.2v up to 3a isl91110iraz vin en lx1 lx2 vout fb sgnd pgnd c 1 2x10f l 1 1h c 2 2x22f mode r 1 r 2 c 3 v out 0.8v 1 r 1 r 2 ------ - + ?? ?? ?? ? = (eq. 1)
isl91110ir fn8709 rev 0.00 page 11 of 13 april 17, 2015 inductor selection an inductor with high frequency core material (e.g., ferrite core) should be used to minimize core losses and provide good efficiency. the inductor must be able to handle the peak switching currents without saturating. a 1h inductor with 5.4a saturation cu rrent rating is recommended. select an inductor with low dcr to provide good efficiency. in applications where radiated noise must be minimized, a toroidal or shielded inductor can be used. pvin and v out capacitor selection the input and output capacitors should be ceramic x5r type with low esl and esr. the recommended input capacitor value is 2x10f. the recommended input capacitor must meet the following requirements: minimum type is x5r, minimum voltage rating is 16v and minimum case size is 0603. the recommended output capacitor value is 2x22f for 3.3v and 3.5v v out applications and 2x47f for 4.5v and 5v v out applications. the recommended output capacitor must meet the following requirements: for 22f, the mini mum type is x5r, minimum voltage rating is 10v, and minimum case size is 0603. for 47f, the minimum type is x5r, minimum voltage rating is 6.3v, and minimum case size is 0603. recommended pcb layout correct pcb layout is critical for proper operation of the isl91110ir. the following are some general guidelines for the recommended layout: 1. the input and output capacitors should be positioned as close to the ic as possible. 2. the ground connections of the input and output capacitors should be kept as short as possible. the objective is to minimize the current loop between the ground pads of the input and output capacitors and the pgnd pins of the ic. use vias, if required, to take advantage of a pcb ground layer underneath the regulator. 3. the analog ground pin (sgnd) should be connected to a large/low-noise ground plane on the top or an intermediate layer on the pcb, away from the switching current path of pgnd. this ensures a low noise signal ground reference. 4. minimize the trace lengths on the feedback loop to avoid switching noise pick-up. vias should be avoided on the feedback loop to minimize the effect of board parasitic, particularly during load transients. the lx1 and lx2 traces should be short and must be routed on the same layer as the ic. table 2. inductor vendor information manufacturer mfr. part number description dimension (mm) website coilcraft xfl4020-102me 1h, 20%, dcr = 10.8m ?? typ ??? i sat = 5.4a (typ) 4x4x2.1 www.coilcraft.com wurth elektronik 7847730 1h, 20%, dcr = 14m ?? typ ??? i sat = 5.72a (typ) 4x4.5x3.2 www.we-online.com table 3. capacitor vendor information manufacturer series website avx x5r www.avx.com murata x5r www.murata.com taiyo yuden x5r www.t-yuden.com tdk x5r www.tdk.com figure 23. recommended layout
fn8709 rev 0.00 page 12 of 13 april 17, 2015 isl91110ir intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2015. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest revision. date revision change april 17, 2015 fn8709.0 initial release
isl91110ir fn8709 rev 0.00 page 13 of 13 april 17, 2015 package outline drawing l20.4x4c 20 lead quad flat no-lead plastic package rev 0, 11/06 located within the zone indicate d. the pin #1 indentifier may b e unless otherwise specified, t olerance : decimal 0.05 tiebar shown (if present) i s a non-functional feature. the configuration of the pin #1 identifier is optional, but mus t be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing c onform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" typical recommen ded land pattern top view bottom view side view 4.00 a 4.00 b 6 pin 1 index area (4x) 0.15 4x 0.50 2.0 16x 20 16 15 11 pin #1 index area 6 2 .70 0 . 15 5 1 20x 0.25 +0.05 / -0.07 0.10 m ab c 20x 0.4 0.10 4 6 10 base plane seating plane 0.10 see detail "x" 0.08 c c c 0 . 90 0 . 1 0 . 2 ref c 0 . 05 max. 0 . 00 min. 5 ( 3. 8 typ ) ( 2. 70 ) ( 20x 0 . 6) ( 20x 0 . 5 ) ( 20x 0 . 25 )

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